Scientists from the Korea Institute of Energy Research (KIER) and Chungbuk National University (CBNU) have developed a new manufacturing process for ultra-thin silicon wafers. They claim their new approach could reduce the cost of crystalline solar cells by half.
Compared to conventional epitaxial processes, which usually produce significant amounts of silicon waste, the new technique effectively delivers ultra-thin wafers without sacrificing any of the substrates, according to the researchers. It is based on plasma-assisted epitaxial (plasma-epi) growth and subsequent hydrogen annealing.
Plasma-epi growth has been previously uaed in solar cell manufacturing, but it resulted in devices with high defect densities and porous structures. Although efforts were made to inhibit material growth and reduce internal defects and porosity, this method never reached the efficiency levels required for commercial production.
The South Korean group took a completely opposite approach and decided to use plasma-epi with the aim of increasing the defect density and maximizing the porosity of the material. By using this “reverse” method, they were able to control the porous structure of silicon and peel off the single crystal silicon wafer grown on it.
“The wafer thickness can be independently controlled during the bulk growth after the formation of plasma-epi seed layer,” the researchers explained.
Thi control strategy of the silicon's nanoporous structure allows the nano-sized pores to merge with each other when subject to high temperatures, so they move to the substrate's surface and disappear. This self-organized nanogap created in the middle of the parent substrate is reportedly easy to remove. And once the ultra-thin wafer is peeled off, the parent substrate can be reused indefinitely without damage. In conventional processes, the parent substrate is gradually lost after several peeling processes, which results in higher manufacturing costs.
“The developed technology is based on chemical vapor deposition, which is widely used in various processes to produce semiconductors, solar cells, displays, and sensors,” said CBNU researcher Kim Ga-hyeon. “Given the high scalability of plasma-epi and its compatibility with conventional semiconductor process, the proposed bottom-up wafer fabrication process will open a new route to developing advanced silicon electronics.”
This content is protected by copyright and may not be reused. If you want to cooperate with us and would like to reuse some of our content, please contact: firstname.lastname@example.org.