The main objective of technology development in the photovoltaics sector is to reduce costs in order to achieve grid parity. Reaching grid parity is becoming more urgent as the incentives in various leading PV markets start getting greatly reduced with the target of being completely eliminated within three to four years. Provided that the additional production costs related to more complex cell and module processes can be limited, targeting high solar cell efficiencies will be a very effective way to strongly reduce the cost of PV modules in terms of dollars per kilowatt peak. Savings that are made in the cost of balance of systems lead to reduced electricity generation costs ($/kWh).
In 2011, around 84 percent of PV module production was based on p-type crystalline silicon (Si) technology. N-type monocrystalline Si had a market share of around four percent. The remaining 12 percent was occupied by thin film PV (CdTe, a-Si, etc.). The p-type versus n-type Si technology scenario has historical reasons. The very first solar cell fabricated in 1954 in the Bell-Labs was made of a monocrystalline n-type Si wafer.
Until the 1980s, the main industrial application of PV was for space applications in the form of satellites and so on. P-type Si proved to be less sensitive to degradation caused by exposure to cosmic rays (high-energy particles such as protons and electrons). Thus for decades, all industrial PV cell development was based on p-type silicon.
Consequently, on an industrial level the key processes such as emitter diffusion and metallization were available only for p-type Si wafer substrates. In the last decade, a lot of research has been done in the field of n-type Si-based PV. The results have proven its potential to outperform compared with the standard p-type Si PV in terms of efficiency. As a consequence, there is a growing interest in the development and the industrial implementation of n-type Si based cell and module technologies. According to the latest edition of the International Technology Roadmap for Photovoltaics (ITRPV 03/2012), its share could reach around 30 percent of the monocrystalline silicon solar module market by 2015.
N-type silicon material
The starting material (Si feedstock) for producing n-type silicon crystals is the same type of polysilicon as that used for p-type Si crystals (based on the Siemens process). The difference is in the doping process during crystallization: while for p-type Si usually boron is used as a dopant, for n-type Si crystals usually phosphorus is added to the Si melt.
In the past 10 years, a lot of scientific research has been carried out on n-type (mainly phosphorus-doped) Si material and related cell processes. This confirmed that compared to standard p-type (boron-doped) Si solar cells, n-type silicon cells feature two important advantages. First, they do not suffer from light induced degradation (LID) caused by the simultaneous presence of boron and oxygen in the wafers, a phenomenon that in standard p-type silicon solar cells leads to a reduction of the module power output by usually two to three percent within the first weeks of installation. Second, n-type Si wafers are less sensitive to impurities that are usually present in silicon feedstock; consequently, less efforts have to be made to obtain n-type Si wafers with a high electronic quality. Accordingly, n-type wafers featuring high solar cell efficiency potential can be produced more cost effectively than high quality p-type wafers. This is in spite of the fact that n-type multicrystalline Si has not yet been studied exhaustively.
It has been shown that using the same cost effective Czochralski (CzSi) pulling method, very high quality monocrystalline n-type wafers featuring a high diffusion length of the charge carriers can be achieved. In addition, the wafers do not suffer from LID and can be manufactured in a routine industrial process.
One of the challenges regarding the wafer material is the homogeneity of the electrical properties within the silicon crystal. Compared to standard p-type (boron-doped) Si, n-type (phosphorus-doped) Si crystals show a larger distribution of specific electrical resistance. While for boron doping, a range between one and three ohm centimeters (?cm) can be easily maintained, in the case of phosphorus doping, this range increases to three to 12 ?cm or more. As standard cell concepts require quite a narrow resistivity distribution in order to allow stable efficiencies for all the wafers coming from one crystal, the large variation of the resistivity of n-type Si crystals decreases their yield for cell production thus increasing overall production costs. There are many n-type float zone silicon (FzSi) and many CzSi wafer suppliers on the market; some of them also offer 156 by 156 square millimeter (mm2 ) wafers. Examples of such companies are Topsil, Norsun, Pillar, MEMC, BOSCH and LDK among others.
One solution is the development of cell designs that are less sensitive to the base resistivity; another is the application of ingot growth techniques based on the continuous feeding of Si feedstock. Such continuous Cz-pulling technologies, aiming at very homogeneous and high quality electrical properties (lifetime and resistivity) are currently under development. Examples are those by Confluence and Solaicx. These are expected to be commercially available in the near future.
Industrial solar concepts
The n-type Si solar cell technologies available on the market or at the industrial research stage can be broken into three categories:
- Front side boron emitter H-pattern devices;
- Rear side emitter H-pattern devices; and
- Rear side emitter rear contact devices.
All mentioned n- and p-type technologies have their limitations in terms of performance, mostly in substrate quality, surface passivation quality and front side shadowing.
The standard p-type solar cell with a homogeneous emitter and aluminum back surface field (Al-BSF) has an efficiency limit of about 19 percent with the current passivation and metallization concepts. If selective emitters are applied, 19.5 percent is feasible and if additional changes are made on the rear side (so called passivated emitter and rear cell, or PERC concept), 20 percent can be reached, as centrotherm has shown in their Centaurus concept. Using open metal rear side (H-pattern) cells with passivated regions between fingers, such as in the Panda n-type approach, rear side reflection and the passivation ability increase the potential of such cells to 21 percent. Additionally, such cells can be used for bifacial installations, which can boost the energy yield (kWh/kWpeak) by up to 25 percent. The cells with the highest efficiency potential are the Heterojunction with Intrinsic Thin layer (HIT) and Interdigitated Back Contact (IBC) concepts reaching efficiencies above 23 percent. However, these cell concepts from Sanyo and SunPower are of a very high complexity resulting in high costs per watt peak.
Most of the solar cells produced currently are p-type based, processed with a standard selective emitter and with the tendency to move towards the PERC concept. However, more and more companies are considering n-type solar cells because of the higher efficiency potential of these concepts. The following n-type solar cell concepts can be found on the PV market currently:
- Sanyo (HIT)
- Roth and Rau (HELiA)
- Yingli (Panda)
- PVGS (EarthON)
- SunPower (IBC)
Additionally, many PV companies R&D departments are working on all the aforementioned concepts, with the idea of bringing these technologies into pilot production soon. Examples are:
- BOSCH, Trina and others;
- Sunways and Suniva (Phostop), and others; and
- Silfab (ZEBRA), Siliken, Trina, and others.
Of course all cell concepts have their own advantages and challenges, not only with regards to the cell but also at the substrate and module levels. However, this article will focus on the cell level issues only.
For the processing of n-type solar cells, standard equipment is used with some necessary additions. However, in order to process the aluminum (Al) rear emitter solar cell (type II), no additional equipment is needed only process optimization. So in this case, wet chemical edge isolation is necessary as well as the printing of Al paste very close to the edges. In addition, no silver/aluminum (Ag/Al) pads can be used on the rear side as the solar cell would be completely shunted if the Al emitter was missing below the rear pads.
Therefore the module process requires a special contacting for stringing such as gluing or soldering of the Al rear contact directly, or a partial removal of the Al paste with a gluing process on the AlSi eutectic. As already mentioned, this is a fairly simple cell process, however having a limitation of about 19.5 percent cell efficiency as the open circuit voltage for a homogeneous Al emitter (or BSF) is limited to about 640 millivolts (mV). However, if n-type silicon is used, no light induced degradation can be observed and this is the advantage of the Al emitter concept compared to p-type Al BSF.
In addition, a very good low light intensity response due to extremely high shunt resistances can be observed for this cell concept as well. The disadvantage is that if one wants to benefit from the high efficiencies, good quality n-type material has to be used as the emitter is on the rear side the effective diffusion length Leff must be three times larger than the cell thickness d (Leff>3d). As the wafer thickness is already to be reduced in the future, this will be advantageous for this cell concept provided that solar cell bowing is evitable.
For the more advanced cell concepts with much higher efficiency potentials such as the boron front emitter and HIT solar cell (type I) or IBC solar cell (type III), some additional processing steps are needed, which will be summarized.
Emitter and BSF diffusion
The most essential process for good processing of advanced n-type solar cells is the creation of a homogeneous and adapted p+ emitter. In the previous case of type II solar cells, this is usually done by the recrystallization process forming an Al-doped region. In the more advanced cell structures, a boron-doped emitter is formed by the growth of an amorphous, boron-doped thin layer (HIT concept). Other concepts use boron diffusion from different precursors. These processes will be discussed.
Intrinsic and doped a-Si layers with B (diborane) and P (phosphine):
For the HIT concept, intrinsic and doped amorphous Si layers are deposited on the front at low temperatures for the emitter (silane and diborane) and the rear for BSF creation (silane and phosphine). Principally, this cell concept can be realized on p-type as well as on n-type Si wafers, however it features the highest efficiency potential when applied on n-type Si substrates.
The low temperatures are advantageous from the point of view of thermal budget very often a gettering step is still required for the silicon material. Since the recent expiration of the Sanyo patent, several companies are working on the commercialization of this process, while Roth&Rau is offering a turnkey solution, single equipment for the deposition of the amorphous Si layers are supplied by various manufacturers (such as Oerlikon and AMAT).
The cleanliness of the surface before the a-Si layer depositions is important for this process. As these layers are not stable against high temperatures above 300to 400 degrees Celsius, low temperature (< 200°C) screen printing pastes have to be used.
Boron diffusion (BBr3/BCl3 tube diffusion and other sources):
A low cost process for the creation of a boron emitter is high temperature diffusion of boron precursors. The most frequently used diffusion type is carried out in an open quartz tube furnace because of the cleanliness, stability and homogeneity of the process.
Tube diffusion process:
Tube diffusion using liquid boron as the source is very similar to POCl3 (Phosphoryl chloride) diffusion, however more complicated than the latter, as different chemical reactions take place during deposition of the boron silicate glass (BSG) and, in addition, a boron rich layer (boron silicide) can be formed, which is a layer that is not etchable by HF and thus can cause problems in further processing.
However if the gas flow parameters are adapted in a certain way, the B-diffusion can be performed without the formation of this undesirable layer and also in a very homogeneous way. Currently there are three large companies who are offering open tube B-diffusion furnaces: Tempress (AP BBr3 ), Centrotherm (AP BBr3 ) and Semco (LP BCl3 ).
Other precursors for B diffusion:
Many companies are also working on alternative processes for B doping, such as from doped oxides, screen printing, spin-on, spraying and dispensing. Some of these techniques still have to be optimized regarding the purity of the dopant sources and of the atmosphere inside the diffusion furnace while others are not proving to be sufficiently cost effective yet. Consequently up to now, these types of technologies are mainly at R&D or pilot stage.
It looks like tube furnace diffusions could get strong competition from the ion implantation process in the future, since selective diffusions are very simple with this method offered by the likes of Varian (AMAT) and Tempress.
However, a high temperature annealing process is still needed after the ion bombardment of the surface. If this is effectively combined with the growth of a thermal oxide, it could offer a very interesting process in the future for IBC solar cell production.
Passivation of the solar cell surfaces in particular of the emitter regions is of paramount importance for achieving high solar cell efficiencies. Apart from choosing passivation layers and technologies that are suited to passivate the respective surface regions (p+, n+, p, n) in an efficient way, the selection of the surface cleaning process that is applied before the creation of the passivating layer also has a decisive impact on the efficiency potential of the cell process as well as on its cost structure.
Surface cleaning steps:
Particularly in the case of the passivation of p+ doped Si, the cleanliness of the surfaces before deposition of the passivation layer, is extremely important for a good passivation quality.
One wet chemical process mostly used in laboratory style processes that effectively removes the impurities from the surface of a silicon wafer is the so-called Piranha clean. This consists of the immersion of the wafers for several minutes in a hot solution of hydrogen peroxide/sulfuric acid (H2 O2 /H2 SO4 )- creating a thin silicon dioxide (SiO2 ) layer followed by a short dip in hydrofluoric acid (HF) that removes the SiO2 formed before creating a fresh and clean silicon surface. Another cleaning process, resulting in similar levels of surface cleanliness, is a cleansing in HF/O3 solution. This process is commercialized as an industrial in-line process with equipment from RENA.
Passivation for p+ surfaces:
While the n+ doped (phosphorus-doped) emitter of a standard p-type cell can be well passivated by a silicon nitride (SiNx) layer formed by plasma enhanced chemical vapor deposition (PECVD) forming at the same time an efficient anti-reflection coating applying this industrial standard process to the boron-doped p+ emitter of an n-type cell not only has no passivating effect, but even deteriorates the surface passivation with respect to an unpassivated surface (depassivation).
Apart from thick thermal SiO2 layers that provide excellent passivation quality but are not suitable for industrial use because of the required high temperatures and long process times, there are several options for industrially viable and cost effective surface passivation for p+ doped silicon surfaces.
The most classic one is probably a stack formed by a thin thermal SiO2 (shorter process time and lower temperature) and a PECVD SiNx layer. Another solution, extensively studied by various R&D institutes in recent years, for which the special equipment has been commercialized by several companies (Roth & Rau, Solaytech, Levitech), is an aluminum oxide (Al2 O3 ) layer, deposited either by atomic layer deposition technology or PECVD. The Al2 O3 layer provides excellent surface passivation (equal or better than thick thermal SiO2 ).
An interesting alternative has also been presented by ISC Konstanz and BOSCH: the boron emitter passivation by a stack of boron silicate glass (BSG) and PECVD SiNx. This technique has the advantage that no additional equipment is needed as the BSG is already formed during the formation of the boron emitter, while the SiNx requires only standard PECVD equipment as used in p-type cell production lines.
Metallization is always the last step in the process but also very important as sometimes the entire device can be harmed if this is not correctly applied.
In the case of the HIT concept, the deposition of a transparent conductive layer known as a transparent conductive oxide (TCO) is essential to enhance lateral conductivity. The two most common materials used as a TCO are indium tin oxide (ITO) and aluminum-doped zinc oxide (AZO). Both are usually deposited on the top of the solar cell as thin layers by sputtering. As sputtering is a high-vacuum process, the TCO deposition represents a not insignificant cost contribution.
As these TCO layers are not stable against high temperatures, the use of low temperature firing metal pastes are required for screen printing of the front contacts.
Screen printing for metallization and other processes:
The classical screen printing process can be applied for all the n-type devices as well. However the pastes have to be modified, as low temperature firing is necessary for the HIT concept and for other concepts, p+ surfaces have to be contacted, which is not possible with a simple Ag paste.
Therefore AgAl is used and still optimized by all suppliers which offer this product (mainly Dupont, Heraeus and Ferro). The Al in the paste allows a good contact resistance, but strongly reduces conductivity and, in addition, limits the open circuit voltage (Voc) due to penetration into the space charge region. Therefore, paste manufacturers are looking for a substitute of the Al in the paste.
In addition to the metallization by screen printing, other screen printed products such as diffusion pastes, diffusion barriers, etching and isolation pastes are gaining more and more importance for advanced cell concepts, not only for n-type but also for p-type devices of higher complexity as in the case of PERC and IBC structures.
Diffusion barriers are an important topic for processing devices with selective diffusions. As already mentioned, this can be achieved by screen printing, however laser processes are getting more and more important for the fabrication of devices of higher complexity.
Lasers can always be applied when selective processes are needed as in the case for selective doping, opening of passivating dielectrics or opening of diffusion barriers. For these specific applications, the choice of the right laser power, frequency and operation speed is of highest importance.
With the optimization and right combination of all the aforementioned cost effective industrial methods, it is now possible to reach efficiencies above 21 percent on large 156 x 156 mm2 n-type wafers, where the cost of ownership is very much comparable with a standard p-type solar cell or even better. The best example for this is the ZEBRA solar cell which is a large IBC solar cell developed by ISC Konstanz and Silfab.
The authors believe that in the future n-type solar cells will become more and more important in concordance with the latest edition (03/2012) of the road map of the ITRPV. This is also reflected by the high interest in the first nPV workshop, which started in Konstanz in 2011 with more than 200 scientists from 20 countries and continues every year with increasing interest.
However, besides the improvements in solar cell technology, it is necessary to advance the modules as well, in order not to lose the benefit of the enhanced performance of the cells. The most important topics besides material savings are the improvement or replacement of the absorbing EVA by silicones (for example Dow Corning, Wacker, Momentive and others), and the replacement of soldering by gluing techniques (for example Hitachi Chemical, Henkel, SONY, Soltabond, and others).
As soon as all these processes are applied and optimized, we will enter into a phase where PV modules will reach efficiencies well above 20 percent with an improved stability of the module power during the modules lifetime and all this at a lower cost (both reduced $/kWp and $/kWh) compared to current standard PV technology. All the scientific and technological progresses and efforts mentioned in this article make us very confident that the industry will enter this phase within the next two years.
Radovan Kopecek, International Solar Energy Research Center Konstanz/ Joris Libal, Silfab SpA