Indium-free passivated solar cell with 22.4% efficiency

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The new energy technologies and nanomaterials (Liten) branch of the French Alternative Energies and Atomic Energy Commission claims to have developed an indium-free monocrystalline solar cell based on passivated contacts with a 22.4% efficiency.

The scientists explained that the device was built with a new cell architecture, named CARLAH, which is based on what they called a “high-temperature heterojunction” approach. The special architecture is created by combining ultra-thin polycrystalline silicon layers, with a thickness of up to 20 nm, with films of passivated transparent conductive oxide (TCO) contacts.

“Our teams have designed a simplified processing method that generates strong ‘external getter' effects (extraction of metallic impurities) suitable for low-cost crystalline silicon (c-Si) substrates with a low carbon footprint,” the research institute specified. “The structures created are, moreover, compatible with integration in Perovskites/c-Si tandem cells.”

The French research group stated that passivated contacts for solar cells are commonly fabricated with tin-doped indium oxide (ITO), which has high costs due to the limited availability of indium. “In order to improve the economical balance and environmental footprint of this type of cell, the ITO layers usually used on the front panel have been compared by our laboratories with Zinc (AZO) based layers on single junction structures,” it further explained. “Like ITO, the AZO layers studied here are deposited by physical vapor deposition (PVD), a process that facilitates their transfer to industry.”

The solar cell was built in industrial format (M2) and its efficiency is currently a world record for this type of cell on an industrial scale, the researchers said.

Liten achieved a 24.25% peak efficiency for a silicon heterojunction solar cell in December 2019. The cell developers said at the time they were able to increase performance by improving the plasma-enhanced chemical vapor deposition of amorphous silicon nanolayers and the conductive and anti-reflective transparent oxide layers. They also reduced wafer-handling damage during manufacturing.

 

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